
Design and VHDL implementation of a high-speed, low-latency Reed-Solomon decoder, developed during my MSc thesis collaboration between UPV and Politecnico di Milano.

Design and VHDL implementation of a high-speed, low-latency Reed-Solomon decoder, developed during my MSc thesis collaboration between UPV and Politecnico di Milano.

Study and implementation of the Harmonic Balance Method for linear and non-linear electrical networks, from UML design to Matlab/Python simulation and hardware validation.

Design and implementation of a custom stepper motor driver board to simplify control logic wiring and validate operation with an STM32F407 system.