Sliding Window DFT with Virtex-4 FPGA

Jul 1, 2012 1 min read

Figure 1) Basic scheme about the SDFT system that I implemented.

I developed a system for computing a Sliding Window DFT (SDFT). For designing it, I had to model systems with Matlab, Simulink and Xilinx System Generator in order to reach the final system. The SDFT was done with a complex multiplier method and with a CORDIC algorithm. The details are visible in the following figures.

Finished the design, I also generated the code and programmed the FPGA to see in reality the results.

The project also includes an appendix at the end where I developed a system for computing the fft of the signal, starting from the CORDIC RM algorithm system.

Figure 2) System realized for computing the whole spectrum SDFT of a signal. Details in the relation.

For downloading the report about this project to know more about it, please click here.